Performance of FPGA HEVC with Advanced Video Coding

Anand Kumar and Dr.M. Janakirani

Field programmable gate arrays high efficient video coding (FPGA HEVC) will be replacing the current standard, H.264/MPEG-4 Advanced Video Coding (AVC). The main goal for FPGA HEVC standardization is to deliver equal video quality for half the bit-rate of H.264/MPEG-4 AVC. Other objective of FPGA HEVC is to support higher resolution than the current high definition (HD) of 1920 × 1080. This paper will briefly highlight new technical features in FPGA HEVC standard. Main focus in FPGA HEVC investigation will be enhancement, changes and improvement compared to H.264/MPEG-4 AVC. Moreover, different configuration of FPGA HEVC encoder will be tested, exclusively in intra/inter-picture configuration, entropy coding setting, de-blocking filters and sample adaptive offset, comparing its performances with H.264/MPEG-4 AVC. Test sequences used in the simulation consist of different resolution and frame rate. The simulation objective is to examine the capabilities of FPGA HEVC in delivering equal or higher quality videos by using objective quality measurement - peak signal to noise ratio (PSNR). All of data collected will be fitted using rate-distortion (RD) curves.

Volume 11 | 04-Special Issue

Pages: 536-546