Various types of architectures for high speed low power Analog-to-Digital Converter(ADC) are reviewed in this paper. Researchers have proposed various types of architectures for the conversion of thermometer code into binary code. Hence, if the design of this converter is improved, the overall system performance will be improved. Some of the architectures which are discussed in this paper are flash ADC, two step ADC, pipelined ADC, Successive Approximation Register(SAR) ADC, Sigma-Delta ADC and hybrid ADC. Flash ADC is meant for high speed conversions whereas Pipelined ADC has the feature of high accuracy with high speed and low power consumption and complexity. SAR ADC has the property of high resolution with reduced latency. Sigma-Delta ADC pushes the quantization error found near the input signal to the higher frequency which is almost near the sampling frequency. To achieve the compactness in the structure, new techniques like Threshold Inverter Quantizer (TIQ) and multipliers are used and voltage-time hybrid ADC are designed. All these designs are still under exploration to achieve high speed with less power consumption. Architecture design considerations are discussed along with its challenges in design criteria which paves the way for the future development in the design of ADC architectures.
Volume 11 | 02-Special Issue
Pages: 736-744