In general, digital watermarking emphasizes on the data hidden techniques and logical concepts which would focus on either image, video, audios from the signal source. This concept relates to a steganography where both the design process are emphasized on securing the input data within the digital signal. In this paper an approach based on Verilog model for the implementation of an invisible and visible watermarking encrypter and decrypter is presented. The insertion of the watermark is dealt with in the discrete spatial cosine modeling. It is a video validation framework hardware model. By utilizing this watermarking procedure structures, even a least video quality can survive certain potential assaults, i.e., conceal assaults, trimming, and portion expulsion on video successions is possible. Moreover, the proposed equipment based watermarking frame work includes low power utilization, ease of execution, high handling rate, and unwavering quality.
Volume 11 | 02-Special Issue
Pages: 609-615