Investigations on power dissipation of low power VLSI architectures for Voltage level shifters

S.Karunakaran, B.Poonguzharselvi

This paper describes analysis of voltage level shifters in terms of average power and delay used in multi-supply design applications. Voltage level shifter is a device which converts one voltage level to another. Voltage level shifters are used to interface various circuit blocks operating at different supply voltages. At the boundaries of different voltage islands on the system-on-chip (SoC) voltage level shifter is used. The proposed voltage level shifter converts low input voltage level into high level voltage output (up shift) and high input voltage level into low level voltage output (down shift) depending on its input with efficient speed and power consumption as compared to bench mark designs. All the designs has been implemented in 90-nm CMOS technology and the one with optimum delay and power consumption has been analyzed.

Volume 11 | 05-Special Issue

Pages: 2229-2234