This paper exhibits a modified DA algorithm (DAA) called symmetric DAA for DWT implementation using 6/10 FIR filter. It is improved its performance by reducing its power consumption and timing. The structure works at a most extreme frequency of 85.433 MHz for LPF and 108.075 MHZ for HPF consuming 242 slice LUTs for LPF and 215 for HPF. The device usage summary shows that the device uses 13%-14% slices, 11%-12% 4 input LUTs, 71% IOBs and 7% flip-flops. The most pessimistic scenario hold delay is 0.712 ns for LPF and 0.806ns for HPF and the best achievable setup time is 11.20 ns for LPF and 8.05ns for HPF. The collective power consumed by the design is 0.044 mw.
Volume 11 | 07-Special Issue
Pages: 111-118